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Toshiba Announces Turnkey IP Subsystem for Implementing 10 Gigabit Ethernet on Custom LSI Platforms

Wednesday, April 6, 2016

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FREMONT, CA: Toshiba, a provider of electrical and electronic services and solutions, announces the availability of an IP subsystem that has been developed in partnership with MoreThanIP, a provider of semiconductors services and solutions. The solution is designed to implement a 10 Gigabit Ethernet interface subsystem into a system LSI.

The IP subsystem consists of a 10 Gigabit Ethernet Media access Controller (MAC), PCS (physical coding sublayer) and high-speed SerDes (Serializer Deserializer) for custom LSI platforms, including application-specific integrated circuit (ASIC) and Toshiba’s Fit Fast Structured Arrays (FFSA).

The subsystem implements a 4-lane XAUI or a single Lane XFI interface that provides connectivity to a large number of Ethernet PHYs and controller ASSPs (Application Specific Standard Products). With support for PFC (Priority Flow Control) and a high level of flexibility, the IP subsystem is particularly suited for data centers and telecoms applications.

Toshiba’s FFSA is a new, flexible custom LSI solution with pre-designed masters featuring configurable I/Os, SerDes, SRAMs and logic devices that can be configured according to customer requirements.

"Together with Toshiba custom LSI solutions and MoreThanIP proven cores, chip producers will now have an integrated solution at their disposal to help speed the design cycle and meet the needs of the growing high-speed Ethernet market," says Francois Balay, CEO of MoreThanIP.

 "Collaboration with MoreThanIP allows us to propose an integrated Ethernet offering with best-in-class IP cores for custom LSI solutions," says Yukihiro Urakawa, Technical Executive of Toshiba.

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