Inspur Partners with Intel to Develop F10A Aiding Software Productivity

SALT LAKE CITY, UT: Inspur partners with Intel on an R&D project - the Field Programmable Gate Array (FPGA) to accelerate card F10A.  Based on OpenCL, F10A is designed for high-density half-length and low-profile, with flexible on-board storage allocation and maximum support of 32GB memory.

F10A is a programmable logic microchip. Its high performance, high density, and high applicability supports two SFP+ GE/10GE interfaces helping transfer data directly from the internet to the board card. This reduces transmission delay as the data need not go through the CPU. It also supports data parallelism in DNRange mode and task parallelism in the Pipeline mode, supporting low-latency, high-intensity applications such as high-performance computing, deep learning, data acquisition, high-frequency transaction, network processing and digital signal processing.

The F10A OpenCL FPGA lies between a dedicated chip and a universal chip with programmability, which helps it to deal with specific applications efficiency. Based on Altera's Arria 10 microchip, F10A has a single precision floating-point performance of 1.5 TFlops, while the highest power consumption is 35W and the performance per watt is 42 GFlops.

OpenCL’s easy programmable high-level development language aids F10A increase Software Productivity. It shortens the development period by adopting software high-level language and programming models. 

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